Zero-IF receiver
US6009126A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 1, 1997 |
| Grant date | Dec 28, 1999 |
| Priority date | — |
| Expiry date | Aug 1, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D2200/0084
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Known is a zero intermediate frequency receiver or zero-IF receiver in which DC-offset correction is done in the I- and Q-paths, after mixing down of the received RF-signal or of an IF-signal. Such a DC-offset correction is not sufficient for high gain I- and Q-paths, particularly not in pagers for receiving long messages. Furthermore, no optimal power saving is achieved if such a receiver alternately operates in receive mode and sleep mode. A zero intermediate frequency receiver is proposed in which DC-offset correction is distributed over the high gain I- and Q-path. Preferably, blocking means are provided between DC-offset correction circuits and low pass filters in the I- and Q-path to prevent that an output signal of an upstream DC-offset correction circuit in the path excites a downstream low pass filter in the path during DC-offset correction. Herewith, considerable power savings are achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.