Semiconductor packaged device and lead frame used therein
US6011220A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 1996 |
| Grant date | Jan 4, 2000 |
| Priority date | — |
| Expiry date | Nov 14, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/00014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a semiconductor packaged device of an LOC structure, a lead frame is formed having leads which extend in two directions from a semiconductor chip. The lead frame further includes dummy frames which extend in the two directions opposite of the directions in which the leads extend. The dummy frames are located below the center line (drawn half-way between the upper surface and undersurface of the device) by depressing the dummy frames before the semiconductor chip is mounted on the lead frame. The inner lead portions of the leads are each adhered to the surface of the semiconductor chip through a tape and connected to electrode pads on the semiconductor chip using bonding wires. The semiconductor chip and its periphery is then sealed with mold resin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.