EEPROM memory programmable and erasable by Fowler-Nordheim effect
US6011717A · kind A · utility
12Cited by
6References
35Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 19, 1996 |
| Grant date | Jan 4, 2000 |
| Priority date | — |
| Expiry date | Jun 19, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/14
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An EEPROM is organized in matrix form in word lines and bit lines. Storage cells are placed at the intersections of these lines. The cells include floating gate storage transistors. Groups of cells having separate bit lines but sharing a word line are created. Each group is connected to a group selection transistor. The group selection transistor selectively connects the control gates of the storage transistors to control lines, which provide potentials for enabling programming, erasure or reading of the storage transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.