Multiple stage and low-complexity motion estimation for interframe video coding
US6011870A · kind A · utility
53Cited by
11References
26Claims
0Family size
Inventors
Key dates
| Filing date | Jul 18, 1997 |
| Grant date | Jan 4, 2000 |
| Priority date | — |
| Expiry date | Jul 18, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/137
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A digital signal processor encodes video signals per MPEG standard to achieve multi-stage, low-complexity motion estimation for interframe video coding. A dual-stage motion prediction module processes a compressed bitstream through pixel-averaging, and then applies a Sum-Of-Absolute-Difference (SOAD) function to the bitstream. A minimum motion vector signal is thereby generated over a search range initially for rough determination, then to provide a more refined estimation, the SOAD function is re-applied to the surrounding 16.times.16 blocks, preferably by full and half-pel vertical and horizontal offsets.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.