Vertically integrated semiconductor package for an implantable medical device
US6014586A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 1997 |
| Grant date | Jan 11, 2000 |
| Priority date | — |
| Expiry date | Feb 27, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic package having vertically integrated components placed upon a substrate surface is configured to increase packing density of the components. Integrated circuits which are vertically-stacked and attached to the substrate surface communicate with surrounding components through connection to bond pads on the substrate surface. The bond pads can be placed entirely about a perimeter of the integrated circuits to achieve optimal packing density. Individual bond pads may be shared by two or more integrated circuits by connection therewith. In an alternative embodiment, a separate integrated circuit is attached to the substrate adjacent to the stacked integrated circuits with a row of shared bond pads positioned therebetween. Individual passive or active components may be placed between bond pads for incorporation into the circuit structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.