Efficient implementation of an FIR filter on a general purpose processor
US6018755A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 1996 |
| Grant date | Jan 25, 2000 |
| Priority date | — |
| Expiry date | Nov 14, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A Finite Impulse Response (FIR) filter is implemented in software on a general purpose processor in a manner which reduces the number of memory accesses as compared to conventional methods. In particular, an efficient implementation for a general purpose processor having a substantial number of registers includes inner and outer loop code which together make ##EQU1## memory accesses and KN multiply-accumulates, where L.sub.1 is the number of output vector elements computed during each pass through the outer loop and where L.sub.2 is the number of taps per output vector element computed during each pass through the inner loop. The efficient implementation exploits L.sub.1 +2L.sub.2 general purpose registers. For an embodiment in which L.sub.1 =L.sub.2 =8, inner and outer loop code make ##EQU2## memory accesses, which for filter implementations with large numbers of taps, approaches a 4.times. reduction in the number of memory accesses as compared to conventional methods.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.