Work station having simultaneous access to registers contained in two different interfaces
US6018781A · kind A · utility
3Cited by
26References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 19, 1992 |
| Grant date | Jan 25, 2000 |
| Priority date | — |
| Expiry date | Oct 19, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4217
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A work station which includes a central processing unit (CPU), first and second interface chips connected to respective external or peripheral units, and a local bus connected to the CPU and chips and adapted for multiple byte data communication between the CPU and chips. First and second one-byte registers are included in the first and second chips, respectively, and are simultaneously accessible by the CPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.