Fabrication of gated electron-emitting device utilizing distributed particles to define gate openings, typically in combination with spacer material to control spacing between gate layer and electron-emissive elements
US6019658A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 1998 |
| Grant date | Feb 1, 2000 |
| Priority date | — |
| Expiry date | Sep 11, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2329/00
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A gated electron-emitter having a lower non-insulating emitter region (42), an overlying insulating layer (44), and a gate layer (48A, 60A, 60B, 120A, or 180A/184) is fabricated by a process in which particles (46) are distributed over the insulating layer, the gate layer, a primary layer (50A, 62A, or 72) provided over the gate layer, a further layer (74) provided over the primary layer, or a pattern-transfer layer (182). The particles are utilized in defining gate openings (54, 66, 80, 122, or 186/188) through the gate layer. Spacer material is provided along the edges of the gate openings to form spacers (102A, 110A, 124A, 140, or 150B). Dielectric openings (80, 114, 128, 144, or 154) are formed through the insulating layer. The dielectric openings can be created before or after creating the spacers. In either case, emitter material in introduced into either the full dielectric openings, or into the portions of the dielectric openings not covered with spacer material, to form electron-emissive elements (106B, 116B, 130A, 146A, or 156B) typically filamentary in shape.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.