Method and apparatus for handling multiple level-triggered and edge-triggered interrupts
US6021458A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 21, 1998 |
| Grant date | Feb 1, 2000 |
| Priority date | — |
| Expiry date | Jan 21, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4812
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus are disclosed for determining whether the highest priority pending interrupt is an active level-triggered interrupt. One method includes: determining whether the vector corresponding to the highest priority pending interrupt matches the vector associated with a particular interrupt input; if it does, determining whether that particular interrupt input is programmed to be a level-triggered interrupt; if it is, determining whether the level-status of that particular interrupt input is active; and, if it is, sending a level-triggered active message for the highest priority pending interrupt, by maintaining the set status of a particular bit. One embodiment of the present invention includes an interrupt service register operable to indicate when an interrupt is being serviced, an interrupt request register operable to indicate when an interrupt is pending, and a comparator operable to compare the vector corresponding to the highest priority pending interrupt with the vector associated with the particular interrupt input. Included also is a control generator coupled to the comparator, and operable to selectively clear and/or set bits contained in the interrupt serv…
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