Fault tolerant sync mark detector for synchronizing a time varying sequence detector in a sampled amplitude read channel
US6023386A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 1997 |
| Grant date | Feb 8, 2000 |
| Priority date | — |
| Expiry date | Oct 31, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/10009
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In a magnetic disk storage system, a sampled amplitude read channel is disclosed that employs a fault tolerant sync mark detector for detecting a sync mark from the channel samples in order to synchronize a time varying sequence detector. The read channel preferably employs PR4 equalization for timing recovery and gain control, and EEPR4 equalization for sequence detection. The EEPR4 sequence detector operates according to a time varying state machine matched to a predetermined trellis code constraint. Because the state machine is time varying, the data stream must be synchronized at the input of the sequence detector rather than at the output as in the prior art. The present invention provides a fault tolerant sync mark detector that detects a sync mark from the EEPR4 channel samples before being input into the sequence detector. In one embodiment, the sync mark detector accumulates a squared error between the read signal sample values and the target sample values of the target sync mark; the sync mark is detected when the accumulated squared error is less than a predetermined lower threshold. In an alternative embodiment, the sync mark detector computes a correlation between the …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.