Patent · US Expired

Method and apparatus for selectively enabling individual sets of registers in a row of a register array

US6023441A · kind A · utility

1Cited by
4References
11Claims
0Family size

Assignee

Inventor

Key dates

Filing dateOct 4, 1996
Grant dateFeb 8, 2000
Priority date
Expiry dateOct 4, 2016

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C8/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and apparatus for selectively enabling individual sets of registers in a row of a register array. One embodiment of the present invention is a register array that has a number of registers arranged in a number of rows and columns. Each row of registers includes N sets of registers, where N is an integer greater than 1. The register array also includes a said selector and N said-selecting enable lines for each row of registers. Each enable line of the N set-selecting enable lines couple the set selector to one set of registers of the N sets of registers in each row. In other words, the set selector enables a particular set of registers (i.e., causes a particular set of registers to output their contents on their output bit lines) by providing an enable signal to the particular set of registers on the enable line that couples the set selector to the particular set of registers.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.