Apparatus and method for analyzing circuits using reduced-order modeling of large linear subcircuits
US6023573A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 1999 |
| Grant date | Feb 8, 2000 |
| Priority date | — |
| Expiry date | Jan 29, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for generating and analyzing reduced-order models of linear circuits. The method and apparatus generates a characteristic tridiagonal matrix using a look-ahead Lanczos procedure and then checks the matrix for stability and passivity. If the matrix is not stable and passive, the matrix is modified via a partial Pade via Lanczos approximation algorithm and then rechecked for passivity and stability. The process is iterated until a passive and stable model is generated. When a satisfactory matrix is generated, a Pade approximant of a transfer function of the circuit is computed and the frequency response of this circuit is generated and displayed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.