Signal processor and method for fast Fourier transformation
US6023719A · kind A · utility
4Cited by
9References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 4, 1997 |
| Grant date | Feb 8, 2000 |
| Priority date | — |
| Expiry date | Sep 4, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/142
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
With reference to FIG. 1 signal processor (10) for performing transformations of sets of input data points comprises a memory for storing a first half input data points and a second half input data points, an adder unit for pairwise adding one real part of each one first half input data point and a second half input data point and providing adder output data, and a computing unit for performing transformations upon the adder output data. Addition for data reduction and data transformation are carried out simultaneously by different units.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.