Multiple channel data bus routing switching including parity generation capabilities
US6023754A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 1994 |
| Grant date | Feb 8, 2000 |
| Priority date | — |
| Expiry date | Jun 9, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bus switch providing versatile data path routing between a first group of busses associated with a disk array controller and a second group of busses associated with the individual disk drives within the disk array. The bus switch comprises a plurality of bus multiplexers, equal in number to the number of drive busses. Each bus multiplexer includes a plurality of inputs, each input being connected to a corresponding one of the controller busses. The multiplexers are responsive to select and enable signals to connect selected controller busses to selected drive busses. The bus switch additionally includes a plurality of bus multiplexers for directing data from the drive busses to the controller busses. A parity generator comprising an exclusive-OR circuit is integrated with the bus switch. The output of the parity generator is also provided to each of the multiplexers and can be directed thereby to any of the controller or drive busses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.