Semiconductor device and method of producing the same
US6025620A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 1998 |
| Grant date | Feb 15, 2000 |
| Priority date | — |
| Expiry date | Apr 2, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/09
Abstract
In a semiconductor device having a DRAM memo cell and a peripheral circuit, source/drain regions of transistors composing the memory cell are not silicided to restrict a junction leak and to improve a refresh characteristic; surfaces of source/drain regions and gate electrodes of transistors composing the peripheral circuit are silicided to reduce resistance of contacts and resistance of wirings for enabling a high-speed operation; side walls made of insulating material are formed on sides of the gate electrodes of the transistor composing the peripheral circuit to serve as a mask when impurities are injected for forming the source/drain regions; and insulating material laminated in the memory cell serves as a mask against siliciding.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.