Non-volatile, static random access memory with store disturb immunity
US6026018A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 20, 1998 |
| Grant date | Feb 15, 2000 |
| Priority date | — |
| Expiry date | Aug 20, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to a non-volatile, static random access memory (nvSRAM) device that addresses the consequence of a manufacturing defect that occasionally occurs during mass production of the nvSRAM device and if not addressed, reduces the yield of the production process. The consequence of the defect is termed a store disturb because the execution of a store operation in a defective nvSRAM causes the bit of data retained in the SRAM portion and, in some cases, the nv portion of the nvSRAM to be instable or corrupted. The present invention provides an nvSRAM device in which the controller provides modified signals to the nvSRAM memory portion of the device that address the store disturb phenomena and, as a consequence, improve the yield of the manufacturing process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.