Semiconductor memory device having multibank
US6026045A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 5, 1998 |
| Grant date | Feb 15, 2000 |
| Priority date | — |
| Expiry date | Mar 5, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is provided a semiconductor memory device having a multibank in which a single large memory cell is divided into a plurality of banks without increasing power consumption and chip size. In the semiconductor memory device, a memory cell array is divided into a plurality of banks arranged alternately, and each bank includes a plurality of unit memory cell arrays. In addition, column selection lines of each bank are connected to alternate output ports of a column decoder, and the column decoder enables the column selection lines of a bank selected from the plurality of banks in response to address decoding signals and bank selection signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.