One load conditional look ahead counter
US6026141A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 16, 1998 |
| Grant date | Feb 15, 2000 |
| Priority date | — |
| Expiry date | Jul 16, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/40
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A high modulus counter is provided for receiving a counter enable (CE) signal which switches between digital states. The counter is a single load conditional look ahead counter having a carry chain isolated from a timing critical path. The counter includes one toggle flip-flop for receiving the CE signal. The flip-flop has a first output and a second output. The first output and the second output are connected to an even counter and an odd counter, respectively. Both the output of the first counter and the output of the second counter are received by each of a plurality of multiplexers which are controlled by the first output of the toggle flip-flop. In this way, the high modulus counter outputs and increments the pointer signals of the odd counter and the even counter, alternatively. The even and odd internal counters are initially set at zero and one, respectively, and each increments by two. A second flip-flop may additionally receive the external CE signal for synchronization. The outputs of the flip-flop may also be received by a pair of AND gates, the outputs of which are received by a pair of PLS generators. The two PLS generator outputs then serve as the respective CE signa…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.