Methods of forming memory devices having protected gate electrodes
US6027971A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 1997 |
| Grant date | Feb 22, 2000 |
| Priority date | — |
| Expiry date | Jul 16, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/30
Abstract
Methods of forming memory device having protected gate electrodes include the steps of forming protection layers on gate electrodes, word lines and related structures and then using these protected structures as etching and implantation masks to reliably form semiconductor regions in a substrate. In particular, methods of forming integrated circuit memory devices preferably include the steps of patterning a field oxide isolation region at a face of a semiconductor substrate to define an active region therein and then forming a gate electrode of a memory device on the active region. Word lines are also formed on the gate electrode and on the field oxide isolation region. A first protection layer, comprising a material which can preferably be used as a selective etching mask, is also formed on an upper surface of the word line to protect the word line. The field oxide isolation region, which may be a relatively thick silicon dioxide layer, is then preferably etched to expose the face of the substrate. Here, the etching step is performed using the protected word line as an etching mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.