Semiconductor integrated circuit
US6028474A · kind A · utility
8Cited by
3References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 24, 1997 |
| Grant date | Feb 22, 2000 |
| Priority date | — |
| Expiry date | Sep 24, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0016
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit includes an input buffer circuit that has an input terminal connected to an external signal input pad. A level-setting resistor is arranged between the input buffer circuit and a reference potential terminal having a reference potential, for holding the input terminal at the reference potential. The level-setting resistor comprises a transistor that is supplied with a control signal, and set to an off state by the control signal when the external signal input pad is in a predetermined potential state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.