Power amplification apparatus and method therefor
US6028485A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 1998 |
| Grant date | Feb 22, 2000 |
| Priority date | — |
| Expiry date | Aug 3, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/0277
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for efficiently amplifying input signals includes multiple amplifiers (20, 30). Each amplifier receives a signal from a power divider (12) where the input signal is split with substantially equal phase. Each amplifier drives a load (40) through a parallel coupled line pair (26, 36). The parallel coupled line pairs are preferably implemented in micro-strip or strip line technology. Each amplifier includes gate bias inputs (24, 34) and drain bias inputs (22, 32). The gate bias inputs can be biased equally and the drain bias inputs can be biased equally, resulting in a parallel, power combined, amplifier configuration. Alternately, the drain bias inputs can be staggered, or the gate bias inputs can be staggered to increase efficiency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.