Quadrature mixer method and apparatus
US6029059A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 30, 1997 |
| Grant date | Feb 22, 2000 |
| Priority date | — |
| Expiry date | Jun 30, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D2200/0084
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A quadrature mixer architecture that mixes the in-phase and quadrature phases within the same cell. The input voltage is applied to the base of a voltage conversion transistor, which converts the input voltage into a bias current on the collector of the voltage conversion transistor. Four mixer transistors have their emitters connected to the collector of the drive transistor so as to receive the bias current. The bases of a first pair of the upper transistors are fed with the in-phase components (e.g., 0 and 180.degree.), while the bases of the other pair of transistors are fed with the quadrature phase components (e.g., 90 and -90.degree. of a local oscillator). The collectors of the mixer transistors are taken as the four output components of the circuit, I.sub.out, I.sub.out.sbsb.--, Q.sub.out, and Q.sub.out.sbsb.--.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.