Method of manufacturing a capacitor
US6030866A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 21, 1997 |
| Grant date | Feb 29, 2000 |
| Priority date | — |
| Expiry date | May 21, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/682
Abstract
A capacitor and a method of manufacturing a capacitor which includes the steps of sequentially forming an insulating layer and an etch stop layer over a semiconductor substrate; selectively etching the etch stop layer and the insulating layer to form a contact hole; forming a plug within the contact hole; forming a pillar on the etch stop layer adjacent to the plug and on the plug; forming a dielectric layer at the sides of the pillar; removing the pillar and forming a conductive layer over the dielectric layer; and forming an insulating layer over the conductive layer and etching the insulating layer and the conductive layer to expose the upper portion of the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.