Nonvolatile semiconductor memory device
US6031764A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 1998 |
| Grant date | Feb 29, 2000 |
| Priority date | — |
| Expiry date | Dec 10, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile semiconductor device comprises a memory cell array with, for example, NAND memory cells, a row decoder for selecting and driving word lines, and data sense amplifier/latch circuits for exchanging data with the selected memory cells via bit lines. The memory cell array is divided into blocks in the direction of word line. The individual blocks are formed in wells formed separately in a semiconductor substrate. Each word line driven by the row decoder is provided continuously by means of control transistors formed in the boundary areas between blocks. Turning off the control transistors enables the data to be erased simultaneously block by block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.