Semiconductor integrated circuit
US6031778A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 23, 1997 |
| Grant date | Feb 29, 2000 |
| Priority date | — |
| Expiry date | Jul 23, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/412
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit capable of eliminating a problem of a conventional semiconductor integrated circuit in that although a power saving mode can be applied normally to a combination circuit, it cannot be applied to a sequential circuit because the sequential circuit operates abnormally in the power saving mode, eliminating its holding data, in the conventional semiconductor integrated circuit. The semiconductor integrated circuit has a controller for varying the threshold voltages of field effect transistors included in the sequential circuit so that the controller places the threshold voltages at a low level in an operating mode to speed up the data write and read, and places them at a high level in an idling mode to reduce leakage currents. This makes it possible to prevent the data held in the sequential circuit from being corrupted and eliminated, and to implement a low power consumption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.