Semiconductor memory device
US6031780A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 4, 1999 |
| Grant date | Feb 29, 2000 |
| Priority date | — |
| Expiry date | Mar 4, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a plurality of memory arrays which are provided on a semiconductor chip, the memory arrays including a predetermined memory array. A plurality of bias-voltage supply circuits respectively supply operating voltages to the memory arrays, the bias-voltage supply circuits including a predetermined supply circuit which supplies an operating voltage to the predetermined memory array. A control circuit controls the bias-voltage supply circuits respectively when a command is externally transmitted to the control circuit. The control circuit outputs a disable signal to the predetermined supply circuit in response to a partial-sleep-mode set command externally transmitted thereto, the disable signal causing the predetermined supply circuit to stop supplying the operating voltage to the predetermined memory array. The control circuit outputs an enable signal to the predetermined supply circuit in response to a cancel command externally transmitted thereto, the enable signal causing the predetermined supply circuit to start the supply of the operating voltage to the predetermined memory array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.