Reconfigurable gate array cells for automatic engineering change order
US6031981A · kind A · utility
14Cited by
4References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 19, 1996 |
| Grant date | Feb 29, 2000 |
| Priority date | — |
| Expiry date | Dec 19, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system to efficiently incorporate engineering change order (ECO) modifications into an integrated circuit layout having configurable gate array cells is provided. In generating the original integrated circuit layout, extra gate array cells are inserted into the layout. These gate array cells can be reconfigured to modify their functionality according to changes specified by the ECO. A new netlist with a description of the required modifications is generated and provided to a place-and-route CAD tool to create a new layout of the integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.