Current-limiting semiconductor configuration
US6034385A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 1998 |
| Grant date | Mar 7, 2000 |
| Priority date | — |
| Expiry date | Jun 22, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/343
Abstract
A semiconductor configuration includes a first semiconductor region which has a predetermined conductivity type and a first surface. There is a contact region disposed on the first surface of the first semiconductor region. There is a second semiconductor region disposed within the first semiconductor region underneath the contact region which has a conductivity type opposite the predetermined conductivity type of the first semiconductor region. A first p-n junction having a first depletion zone is formed between the first semiconductor region and the second semiconductor region. The second semiconductor region extends further than the contact region in all directions parallel to the first surface of the first semiconductor region to form at least one lateral channel region with a bottom in the first semiconductor region. The at least one lateral channel region is bounded toward its bottom by the first depletion zone of the first p-n junction. In an on state of the semiconductor configuration, the at least one lateral channel region conducts an electric current from the contact region or to the contact region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.