System and method for concatenating reed-solomon and trellis codes
US6034996A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 2, 1997 |
| Grant date | Mar 7, 2000 |
| Priority date | — |
| Expiry date | Oct 2, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/3422
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An apparatus is provided for concatenating Reed-Solomon and trellis encoders. Preferably, the apparatus includes an input for receiving a plurality of information bits. The plurality of information bits are divided or defined to comprise a first portion and a second portion. A Reed-Solomon encoder is disposed to receive the second portion of input bits and generate a first encoded output. A trellis encoder disposed to receive the output of the Reed-Solomon encoder and configured to generate a second encoded output. Finally, a mapper is disposed to receiver the bits output from the trellis encoder as well as the first portion of input bits. Consistent with the invention, the mapper is configured to generate output signals that are uniquely defined by the input bits in accordance with, for example, a set partition, wherein the first portion of input bits are defined by the mapper to generate output symbols having larger Euclidean distances than the Euclidean distances separating the symbols defined by the second encoded output bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.