Apparatus for amplifying a signal using digital pulse width modulators
US6038265A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 1997 |
| Grant date | Mar 14, 2000 |
| Priority date | — |
| Expiry date | Sep 24, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06J1/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic apparatus that includes a digital processor (12), a first digital pulse width modulator (304), a second digital pulse width modulator (306), a combining circuit (308), and a load (310). The digital processor (12) produces a first digital signal (314) and a second digital signal (316). The first digital pulse width modulator (304) is responsive to the first digital signal (314), and the second digital pulse width modulator (306) is responsive to the second digital signal (316). The combining circuit (308) is responsive to the first digital pulse width modulator (304) and the second digital pulse width modulator (306). The load (310) is responsive to the combining circuit (308).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.