Efficient way to produce a delayed version of a maximum length sequence using a division circuit
US6038577A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 9, 1998 |
| Grant date | Mar 14, 2000 |
| Priority date | — |
| Expiry date | Jan 9, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/723
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for efficiently producing a delayed version of a maximum length sequence output from a linear feedback shift register. Polynomial (vector) exponentiation is performed instead of matrix exponentiation to calculate the mask coefficients which yield the delayed sequence from the linear feedback shift register. Polynomial (vector) operations are much simpler and faster than the corresponding matrix operations and require substantially less circuitry and computational effort. Modulo exponentiation of polynomials is done by repeated squaring and shifting, and a division circuit built on a linear feedback shift register is provided to perform an efficient modulo squaring of polynomials.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.