Microcontroller having register direct and register indirect addressing
US6038655A · kind A · utility
13Cited by
15References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 16, 1997 |
| Grant date | Mar 14, 2000 |
| Priority date | — |
| Expiry date | Jan 16, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00361
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A microprocessor on-board RAM provides both the usual random access by addressing and a subset of memory cells with their contents continually available on a secondary bus paralleling the data bus. This secondary bus may be used for register indirect addressing without a separate register read when the RAM subset includes the registers for register indirect addressing. The processor also has a two stage output driver for limiting maximum output current and feedback-controlled clock period partitioning.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.