Direct conversion receiver using single reference clock signal
US6040738A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 30, 1998 |
| Grant date | Mar 21, 2000 |
| Priority date | — |
| Expiry date | Nov 30, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0057
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A direct conversion receiver includes a reference clock signal generating section for generating reference clock signal. An amplifier section amplifies a received signal and extracts a desired signal from the amplified signal. An extraction reference clock signal generating section frequency-divides the reference clock signal based on a frequency division data to generate first and second extraction reference clock signals. An extracting section extracts a data from the desired signal and the first and second extraction reference clock signals. A control and processing section outputs the frequency division data to the extraction reference clock signal generating section and processes the data based on a control section clock signal corresponding to the reference clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.