Low-voltage, low-jitter voltage controlled oscillator
US6043719A · kind A · utility
69Cited by
1References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 16, 1999 |
| Grant date | Mar 28, 2000 |
| Priority date | — |
| Expiry date | Mar 16, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/354
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A low-voltage, low-jitter voltage controlled oscillator according to the invention includes a plurality of delay units electrically connected in series to form a closed loop circuit. Each delay unit has a symmetric differential structure constituted by a plurality of MOS FETs. Furthermore, only two transistors are stacked between the power source and ground. Thus, the low-voltage, low-jitter voltage controlled oscillator can operate at low voltage, and can not be affected by the variation of the power source voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.