Memory integrated circuit for storing digital and analog data and method
US6044004A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 22, 1998 |
| Grant date | Mar 28, 2000 |
| Priority date | — |
| Expiry date | Dec 22, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes an array of floating gate FET memory cells capable of storing either analog or digital data. The memory device includes first read-write circuitry for storage and retrieval of digital data, and second read-write circuitry for storage and retrieval of analog data. As a result, the digital data storage capability facilitates real-time operation of devices using the memory device without sacrificing the memory capacity capabilities of analog data storage. When a host device using the memory device is not in use, the stored digital data may be read out from the memory device, converted to analog form and then stored in the memory device, re-capturing the data density capabilities of analog data storage in floating gate FET memory cells. Analog data latency comparable to digital data latency is achieved by reading the analog data out from the memory cells, refreshing the analog data and then re-storing digital or analog data corresponding to the refreshed analog data in the memory cells in response to predetermined criteria.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.