Flash memory device
US6044017A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 1998 |
| Grant date | Mar 28, 2000 |
| Priority date | — |
| Expiry date | May 19, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flash memory includes an array of memory cells having sources, drains, floating gates, and control gates. The array includes a conductive plate formed over the memory cells to affect a capacitive coupling between the memory cells and the conductive plate. A first voltage source provides a first voltage to the control gate of a selected one of the memory cells. A second voltage source provides a second voltage to the conductive plate after the control gate of the selected one of the memory cells has been charged up to a predetermined voltage level. Additionally, the flash memory includes a switching circuit to transfer the first and second voltages to the control gate of the selected memory cell and the conductive plate, respectively, responsive to a first and second control signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.