Digital pulse width modulator
US6044113A · kind A · utility
23Cited by
5References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 17, 1999 |
| Grant date | Mar 28, 2000 |
| Priority date | — |
| Expiry date | Feb 17, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K7/08
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital pulse width modulation circuit and method includes a first pulse width clock signal modulated by a second pulse width clock signal that represents a converted analog voltage input. The first and second pulse width signals are provided to a counter that counts to a predetermined gate count, wherein an output pulse width signal is provided that is in proportion to the analog voltage input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.