Parallel-pipelined image processing system
US6044166A · kind A · utility
45Cited by
23References
26Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 23, 1996 |
| Grant date | Mar 28, 2000 |
| Priority date | — |
| Expiry date | Feb 23, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG08G1/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus for image processing a sequence of images containing a parallel-pipelined image processor comprised of image memories, a pyramid processing circuit, an arithmetic logic unit, a crossbar switch for video routing through the various components of the processor, signal processors to provide hardware programming through a global bus and also perform image processing operations. Images can be passed directly from the crossbar switch to internal static RAM of the signal processors through a first-in, first-out interface at full video rates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.