Receiving circuit
US6044254A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 1997 |
| Grant date | Mar 28, 2000 |
| Priority date | — |
| Expiry date | Dec 29, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A receiving circuit includes a first antenna 1, a second antenna 2, units 10 and 11 for generating a sum signal or a difference signal from signals of two paths received by the respective antennas, a unit 12 for giving delay to either an output of the sum signal generating unit or an output of the difference signal generating unit, a unit 13 for summationally combining an output of the delay unit and the signal of the not-delayed path, a desired-wave pass filter unit 14 for receiving an output of the summationally combining unit, a dividing unit 15 for receiving an output of the desired-wave pass filter unit, an orthogonal detection unit 16-19 for receiving an output of the dividing unit, and a filter unit 20 and 21 for receiving an output of the orthogonal detection unit to extract a base band signal therefrom, wherein the receiving path including the summationally combining unit and the following are made into one path to thereby attain miniaturization and low power consumption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.