Flat panel display having a random spacer arrangement
US6046541A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 15, 1997 |
| Grant date | Apr 4, 2000 |
| Priority date | — |
| Expiry date | Dec 15, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2329/864
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A flat panel display (12) includes a backplate (14) and a faceplate (16) attached to the backplate (14) defining a vacuum enclosure (18) therebetween. A spacer (46, 62, 64, 78, 80, 90) is positioned between the backplate (14) and the faceplate (16). The spacer geometry is anti-symmetrical and non-integral with respect to an array of electron emitters (30, 48, 76) on a cathode plate (22) overlying the backplate (14). The spacers have a curved surface (52, 78, 82) that is characterized by a radius r, or by a length d.sub.3 of a unit shape having bend angles .alpha. and .beta., whereas the electron emitter arrays are characterized by orthogonally arranged rows (32) and columns (34). The anti-symmetrical and non-integral relationship between the spacers (46, 62, 64, 78, 80, 90) and the electron emitters reduces the number of electron emitters and pixels (49, 77, 86) that are occluded by the spacers. Additionally, the anti-symmetrical and non-integral relationship permits the spacers (46, 62, 64, 78, 80, 90) to be randomly distributed between the backplate (14) and the faceplate (16) of the flat panel display (12). A spacer processing method includes the step of cutting ribbons from a t…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.