Post-filtered delta sigma for controlling a phase locked loop modulator
US6047029A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 1997 |
| Grant date | Apr 4, 2000 |
| Priority date | — |
| Expiry date | Sep 16, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/2017
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency synthesizer has a phase locked loop, a .DELTA..SIGMA. modulator, and a filter. The phase locked loop includes a frequency divider that controls the frequency of the phase locked loop output signal. The output of the .DELTA..SIGMA. modulator is fed through the filter and the output of the filter is used to control a division factor in the frequency divider. Compensation may be performed at the input to the .DELTA..SIGMA. modulator in order to compensate for the filtering performed between the .DELTA..SIGMA. modulator and the frequency divider. The filter may be used to reduce quantization noise in an input to the frequency divider, and thereby reduces phase noise in an output of the phase locked loop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.