Buffering data that flows between buses operating at different frequencies
US6047339A · kind A · utility
48Cited by
18References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 27, 1997 |
| Grant date | Apr 4, 2000 |
| Priority date | — |
| Expiry date | Oct 27, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4059
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A "virtual FIFO" system for use in buffering data between transacting buses that transfer data at different rates includes a memory device and a controller that partitions the memory device into multiple regions, each of which is configured to operate as a distinct data buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.