Method and apparatus for supporting multiple processor-specific code segments in a single executable
US6049668A · kind A · utility
33Cited by
7References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 13, 1998 |
| Grant date | Apr 11, 2000 |
| Priority date | — |
| Expiry date | Apr 13, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/44547
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer-implemented method identifies a code segment which is to be customized to a plurality of different processor types. The method generates object code for the code segment, including generating a plurality of sections for the code segment, each of the plurality of sections being object code for the code segment customized for one of the plurality of different processor types, and generating a control section that causes a selected one of the plurality of sections to be called during execution of the object code in accordance with an executing processor's processor type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.