Data processor with multiple register queues
US6049839A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Dec 23, 1993 |
| Grant date | Apr 11, 2000 |
| Priority date | — |
| Expiry date | Dec 23, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/384
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processor includes a register group having registers of the number larger than the number of registers which can be designated by a register specifier field of an instruction. The register group consists of a plurality of register queues with respect to logical register numbers designated in the instruction, each register queue including a plurality of physical registers. In the data processor, a physical register number forming section is provided for converting the logical register number to a physical register number in the register queue corresponding to the logical register number, by using queue control information designated in the register specifier field and read/write information decided by the kind of the instruction and the position of the register specifier field in the instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.