Efficient data transfer mechanism for input/output devices
US6049842A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 1997 |
| Grant date | Apr 11, 2000 |
| Priority date | — |
| Expiry date | May 1, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2205/066
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for transferring data between non-contiguous buffers in a memory and an I/O device via a system I/O bus uses a descriptor queue stored in memory. Each descriptor points to a buffer and includes the length of the buffer. The I/O device is provided with the base address of the queue, the length of the queue and a current address which at initialization is the same as the base address. When data is to be transferred a device driver located in the processor sends the number of available descriptors (DescrEnq) to the I/O device which accesses the descriptors individually or in burst mode to gain access to the data buffers identified by the descriptors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.