Image-processing processor
US6049859A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 1998 |
| Grant date | Apr 11, 2000 |
| Priority date | — |
| Expiry date | Jul 15, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17337
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The subject matter of the application essentially relates to a matrix array of processor units, each processor unit having, in addition to an arithmetic logic unit and a result register bank, a further arithmetic logic unit, a multiplier/adder unit, a storage unit of a distributed screen section buffer and a local general purpose memory. The processor is distinguished by a high processing speed in conjunction with a small chip area and enables real-time processing even in the case of computation-intensive image processing methods such as 2D convolution, Gabor transformation, Gaussian or Laplacian pyramids, block matching, DCT or MPEG2.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.