Signal processor executing compressed instructions that are decoded using either a programmable or hardwired decoder based on a category bit in the instruction

US6049862A · kind A · utility

Assignee

• U.S. Philips Corporation · US

Inventors

• Harald Bauer · Ehningen, DE
• Peter Kempf · Bad Oldesloe, DE
• Dietmar Lorenz · Erlangen, DE
• Peter Meyer · Beverungen, DE

Key dates

• Filing date: Jul 16, 1997
• Grant date: Apr 11, 2000
• Expiry date: Jul 16, 2017

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F9/30196
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A signal processor is disclosed having a program memory which stores compressed program instructions and a decoder device which decodes the compressed program instructions to form decoded program instructions for controlling functions of the signal processor. The decoder device has a programmable decoder and a fixed decoding arrangement, where the fixed decoding arrangement is non-programmable and hardwired for decoding the compressed program instructions using logical operations. The programmable decoder includes a decoder memory, such as a ROM or RAM, having cells for storing the decoded program instructions in an uncompressed form. These cells are addressed for executing programmable decoding functions of the programmable decoder. The compressed program instructions include a first number of bits for determining a category of the compressed program instructions and a second number of bits for determining the address of the cells. A control unit detects the category of the compressed program instructions and outputs a control signal to a multiplexer, which selectively connects the programmable decoder or the fixed decoding arrangement to the output of the signal processor.