Nonvolatile semiconductor memory device and method for fabricating the same and semiconductor integrated circuit
US6051860A · kind A · utility
33Cited by
2References
7Claims
0Family size
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Key dates
| Filing date | Jan 16, 1998 |
| Grant date | Apr 18, 2000 |
| Priority date | — |
| Expiry date | Jan 16, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
In a semiconductor substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first surface region and the second surface region together, a channel region has a triple structure. Thus, a high electric field is formed in a corner portion between the step side region and the second surface region and in the vicinity thereof. A high electric field is also formed in the first surface region. As a result, the efficiency, with which electrons are injected into a floating gate, is considerably increased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.