Stabilizing circuit and amplifier
US6052029A · kind A · utility
9Cited by
7References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 23, 1998 |
| Grant date | Apr 18, 2000 |
| Priority date | — |
| Expiry date | Jun 23, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/086
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A capacitor is connected between the gate of an FET and an input node, and a resistor is connected between the input node and a ground terminal, thereby preventing the FET from oscillating in a low-frequency domain. A capacitor is connected between the drain of the FET and a ground terminal, or a line and a capacitor are connected in series between the drain of the FET and a ground terminal, thereby preventing the FET from oscillating in a high-frequency domain or at a specific frequency in the high-frequency domain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.