Method for reducing the rendering load for high depth complexity scenes on a computer graphics display
US6052125A · kind A · utility
61Cited by
6References
36Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 7, 1998 |
| Grant date | Apr 18, 2000 |
| Priority date | — |
| Expiry date | Jan 7, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for rendering a real-time synthetic environment on a computer display. A hidden surface removal technique is provided which combines an efficient pixel rendering architecture with a simplified modeling process. Specifically, the computer pixel graphics hardware processing load is balanced against a software geometric load to obtain optimum rendering performance by utilizing a "full" buffer in combination with adaptations of the z-Buffer and priority-list algorithms.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.